Bhattacharjee, Dr. A. K.
-
Vol 1, No 1 (2011) - Case Study
Modelling of Skin Effect in On-Chip VLSI RLC Global Interconnect
Abstract
ISSN: 2249 – 474X
Journal of VLSI Design Tools & Technology
Subscription
Login to verify subscription
User
Font Size
Language
Information
Keywords
45nm Technology
ADC
Carry Select Adder (CSLA)
Comparator
Current Controlled Conveyor, Current Mode, Translinear, SPICE.
Gate Diffusion Input (GDI)
Low Power
MOS technology
Noise Shaping
Over Sampling Ratio
Pipelined ADC
Shift register, dual-edge triggered, flip-flop, low power, multi-threshold CMOS.
Sigma Delta
Silicon-on-insulator (SOI)
Speed
device scaling
digital calibration
dynamic comparator
non-linearity correction
semiconductor manufacturing
static comparator
Current Issue
