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Performance Estimation of VLSI Design

Arindam Sadhu, Pritam Bhattacherjee, Sabnam Koley

Abstract


This paper explores performance estimation of VLSI design using simple RC delay model based an Elmore Delay Method. In this paper Pre-layout & Post-layout VLSI design flow for delay convergence is also shown.

 



Keyword: Propagation delay, NMOS, PMOS, Rise Time, Fall Time, Elmore Delay, Layout


Keywords


Propagation delay , NMOS, PMOS, Rise Time, Fall Time, Elmore Delay, Layout.

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