Effect of Inter Shell Spacing on Performance of MWCNT Bundle at 100 µm Interconnect Length

Abstract

This paper introduces the aspects of the utilization of Multi Wall Carbon Nanotube (MWCNT) as VLSI interconnects. The equivalent impedance parameters are figured concerning inter-shell spacing for L=100 µm and examination through diagrams are demonstrated. The delay and power dissipation of MWCNT with changing inter shell spacing have additionally been mimicked for ideal driver size and ideal number of repeaters at 32 nm, 22 nm and 16 nm technology nodes, along with the examination of normalized delay of MWCNT and Copper. The SPICE simulations demonstrate that the propagation delay increases and power dissipation decreases with increase in inter-shell spacing. The outcomes have been simulated utilizing SPICE in TSMC 32 nm, 22 nm and 16 nm CMOS technology. It has been examined that MWCNT can possibly be utilized as a VLSI interconnects over copper for future.

Keywords: Multi wall CNT, propagation delay, power dissipation, inter-shell spacing, copper

Cite this Article

Akshi Acharya, Abhishek Shrivastava, Gaurav Musalgaonkar. Effect of Inter Shell Spacing on Performance of MWCNT Bundle at 100 µm Interconnect Length.  Journal of VLSI Design Tools and Technology. 2015; 5(3): 71–79p.