Comparative Analysis of Various Existing NT SRAM Cells with High Speed Low Power 8T SRAM Cell

Autor/innen

  • P. Raikwal Department of Electronics and Telecommunication Engineering, Institute of Engineering and Technology, Devi Ahilya Vishwavidyalaya, Indore, Madhya Pradesh, India
  • V. Neema Department of Electronics and Telecommunication Engineering, Institute of Engineering and Technology, Devi Ahilya Vishwavidyalaya, Indore, Madhya Pradesh, India
  • A. Verma Department of Electronics and Instrumentation Engineering, Institute of Engineering and Technology, Devi Ahilya Vishwavidyalaya, Indore, Madhya Pradesh, India

Abstract

The high speed along with low leakage devices are in demand in current CMOS technology era. With the advancement of technology, it is a big challenge to keep the balance of sizing and other parameters such as leakage current, delay and stability. In this paper, different cell topologies 6T, 7T, 8T, 9T and 10T SRAM cell are discussed and compared with the proposed single ended 8T SRAM cell. The comparison has been carried out on different parameters like, read and write access delay, write margin, read and hold stability, and leakage current. The analysis depicts that proposed cell shows less read and write access delay which is 114.13 and 38.56 ps respectively. The 6T SRAM cell consumes highest leakage current 349.104 nA, whereas the proposed cell consumes 671.22 pA. The 9T SRAM and 10T SRAM cell shows the highest write margin, read and hold static margin. The write margin, read and hold static margin for 9T SRAM and 10T SRAM cell are 388mv, 367mv, 373mv and 387mv, 368mv, 387mv respectively; whereas for proposed 8T cell it is 310mv, 343mv and 329mv.   Keywords: CMOS technology, SRAM, stability, single endedCite this Article Raikwal P, Neema V, Verma A. Comparative Analysis of Various Existing NT SRAM Cells with High Speed Low Power 8T SRAM Cell. Journal of VLSI Design Tools & Technology. 2017; 7(2): 30–36p.

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2017-09-19

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Bd. 7 Nr. 2 (2017)

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Research Articles

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