Implementation of Register Access Methods for Device Configuration Using UVM

Abstract

Verification of hardware registers conjointly with their monitoring forms a huge part of any verification project. Verification using universal verification methodology (UVM) register layer enables reusability, which consequently eliminates the dependency of register layer on protocol  thereby saving time by evading efforts of rewriting register sequences once the protocol changes. This paper constructs the advanced high performance bus (AHB) register verification environment to ease design configuration, thereby promoting reusability and productivity along with utility of deprecated simulation time. By developing AHB register verification environment, analysis of access methods is also performed to determine scenarios for the best possible application of access methods.   

Keywords: UVM register layer, AMBA AHB, verification

Cite this Article

Dahiya J, Shukla NK. Implementation of Register Access Methods for Device Configuration using UVM. Journal of VLSI Design Tools and Technology. 2015; 5(3): 132–138p.